As metal oxide semiconductor field effect transistors (MOSFETs) scale down in size, higher performance can be achieved by bringing metal silicide contacts closer to the gate conductor. There are difficulties however in forming self-aligned metal silicide contacts close to the gate conductor edge. For example, relatively thick silicides (on the order of about 20 nm or greater), which are required to meet sheet resistivity in the diffusion and polycide, will consume silicon and can interfere with the integrity of an ultra shallow junction that is typically present near the gate edge under the spacer.
For ultra-thin body MOSFETs in which the device channel has a thickness of about 20 nm or less, the thickness of the silicon available to form a silicide contact is limited. So-called raised source/drain regions (RSD, or also called elevated source/drain regions) can mitigate this problem. However, RSD regions that are positioned close to the gate conductor edge will increase the capacitance between the gate and the source/drain regions.
In view of the above, there is a need for providing a MOSFET structure having self-aligned metal silicide contacts that are close to the gate conductor edge that do not consume sufficient silicon such that the integrity of the ultra shallow junction is not effected. Moreover, a MOSFET structure is needed in which the silicide located in proximity to the gate conductor edge does not increase the capacitance between the gate and the source/drain regions.